1 ? fn3573.3 hs-139rh radiation hardened quad voltage comparator the radiation hardened hs-139rh consists of four independent single or dual supply voltage comparators on a single monolithic substrate. the common mode input voltage range includes ground, even when operated from a single supply, and the low supply current makes these comparators suitable for low power applications. these types were designed to directly interface with ttl and cmos. the hs-139rh is fabricated on our dielectrically isolated rad hard silicon gate (rsg) process, which provides an immunity to single event latch-up and the capability of highly reliable performance in any radiation environment. specifications for rad hard qml devices are controlled by the defense supply center in columbus (dscc). the smd numbers listed below must be used when ordering. detailed electrical specifications for the hs-139rh are contained in smd 5962-98613. a ?hot-link? is provided on our homepage with instructions for downloading. www.intersil.com/s pacedefense/newsafclasst.asp features ? qml qualified per mil-prf-38535 requirements ? radiation environment - latch-up free under any conditions - total dose (max) . . . . . . . . . . . . . . . . . 3 x 10 5 rad(si) - seu let threshold . . . . . . . . . . . . . . . 20mev/cm 2 /mg - low dose rate effects immunity ? 100v output voltage withstand capability ? esd protection to >3000v ? differential input voltage range equal to the supply voltage ? input offset voltage (v io ) . . . . . . . . . . . . . . . . 2mv (max) ? quiescent supply current . . . . . . . . . . . . . . . . 2ma (max) applications ? pulse generators ? timing circuitry ? level shifting ? analog to digital conversion pinouts s hs-139rh (sbdip cdip2-t14) top view hs-139rh (flatpack cdfp3-f14) top view ordering information ordering number internal mkt. number temp. range ( o c) 5962f9861301vcc hs1-139rh-q -55 to 125 5962f9861301qcc hs1-139rh-8 -55 to 125 hs1-139rh/proto hs1-139rh/proto -55 to 125 5962f9861301vxc hs9-139rh-q -55 to 125 5962f9861301qxc hs9-139rh-8 -55 to 125 hs9-139rh/proto hs9-139rh/proto -55 to 125 out 2 out 1 v+ - in 1 + in 1 - in 2 + in 2 out 3 out 4 gnd + in 4 - in 4 + in 3 - in 3 1 2 3 4 5 6 7 14 13 12 11 10 9 8 14 13 12 11 10 9 8 2 3 4 5 6 7 1 out 2 out 1 v+ - in 1 + in 1 - in 2 +in 2 out 3 out 4 gnd + in 4 - in 4 + in 3 - in 3 data sheet december 22, 2004 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-352-6832 | intersil (and design) is a registered trademark of intersil americas inc. copyright intersil americas inc. 1999, 2004. all rights reserved all other trademarks mentioned are the property of their respective owners.
2 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn3573.3 december 22, 2004 die characteristics die dimensions: 3750 m x 2820 m (148 mils x 111 mils) 483 m 25.4 m (19 mils 1 mil) interface materials: glassivation: type: silox (sio 2 ) thickness: 8.0k? 1.0k? top metallization: type: alsicu thickness: 16.0k? 2k? substrate: radiation hardened silicon gate, dielectric isolation backside finish: silicon assembly related information: substrate potential: unbiased (di) additional information: worst case current density: <2.0 x 10 5 a/cm 2 transistor count: 49 metallization mask layout hs-139rh gnd +in4 -in4 v+ -in1 +in1 +in3 -in3 +in2 -in2 out4 out3 out2 out1 (9) (8) (7) (6) (5) (4) (3) (2) (1) (14) (13) (12) (11) (10) hs-139rh
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